ATMEGA649V-8MI【PDF 145/146 页】IC AVR MCU FLASH 64K 1.8V 64QFN

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Sheet目录1905

141页 142页 143页 144页 [145页]146页

2552K–AVR–04/11

ATmega329/3290/649/6490

2.3.9

Port G (PG5..PG0)

Port G is a 6-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port G output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port G pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port G pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port G also serves the functions of various special features of the ATmega329/3290/649/6490

as listed on page 75.

2.3.10

Port H (PH7..PH0)

Port H is a 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port H output buffers have symmetrical drive characteristics with both high sink and source

capability. As inputs, Port H pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port H pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port H also serves the functions of various special features of the ATmega3290/6490 as listed

on page 75.

2.3.11

Port J (PJ6..PJ0)

Port J is a 7-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The

Port J output buffers have symmetrical drive characteristics with both high sink and source capa-

bility. As inputs, Port J pins that are externally pulled low will source current if the pull-up

resistors are activated. The Port J pins are tri-stated when a reset condition becomes active,

even if the clock is not running.

Port J also serves the functions of various special features of the ATmega3290/6490 as listed on

page 75.

2.3.12

RESET

Reset input. A low level on this pin for longer than the minimum pulse length will generate a

reset, even if the clock is not running. The minimum pulse length is given in “System and Reset

Characteristics” on page 330. Shorter pulses are not guaranteed to generate a reset.

2.3.13

XTAL1

Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.

2.3.14

XTAL2

Output from the inverting Oscillator amplifier.

2.3.15

AVCC

AVCC is the supply voltage pin for Port F and the A/D Converter. It should be externally con-

nected to V

CC, even if the ADC is not used. If the ADC is used, it should be connected to VCC

through a low-pass filter.

2.3.16

AREF

This is the analog reference pin for the A/D Converter.

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